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The Agilent E4808A Clock module (VXI) includes a PLL (Phase-Locked Loop) frequency generator to provide a system clock. Depending on the frequency chosen, the data modules can be clocked at a ratio of 1, 2, 4, 8, 16, 32, 64 or 256 times higher or lower than the system clock. External start/stop; The data running can be started by an external signal applied to the external input. With module E4832A there is also Stop and Gate mode. Ext. Clock/Ext. Reference; This input runs ParBERT 81250 synchronously with an ext. clock, or when a more accurate reference is needed than the internal oscillator. Usage of a continuous clock is necessary. Burst clock cannot be used as an external clock. Maximum external clock is 10.8Gbit/s for the E4808A. (Note: no improvement of jitter specifications will be achieved). Guided deskew; Individual semi-automatic deskew per channel. The deskew probe 15447A allows deskew on the DUT's (Device Under Test) fixture. Specifications. Frequency range (can be entered as period or frequency): 170 kHz to 675 MHz. Resolution: 1Hz. Accuracy: ±50 ppm with internal PLL reference. Zin/Termination voltage: 50 Ohm/-2.10 V to 3.30 V. Sensitivity/max levels: 200 mVpp/-3 V to + 6V for < 9.5Gbit/s, 300mVpp/-3V to+ 6V for > 9.5 Gbit/s. Input transitions/slope: < 20ns. Ext. input active edge is selectable. Input frequency/period Ext. Clock: 170 kHz - 10.8 GHz.
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