ANRITSU MP1763C REPAIR and ANRITSU MP1763C CALIBRATION

 
Custom-Cal has a high success rate in the repair of the ANRITSU MP1763C. A calibration by Custom-Cal is performed by engineers with extensive OEM experience. We have the expertise and the necessary standards to perform the ANRITSU MP1763C Calibration, onsite calibration may be available. We specialize in quick turnaround times and we can handle expedited deliveries upon request.

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   ANRITSU MP1763C   Description / Specification:    
ANRITSU MP1763C Pulse Pattern Generator

The Anritsu MP1763C 0.05 to 12.5 GHz Pulse Pattern Generator is used in combination with the MP1764C/1764D Error Detector. The MP1763C Pulse Pattern Generator combined with the MP1764C/1764D Error Detector are a BERTS (Bit Error Rate Test Set) supporting evaluation and testing of transmission equipment, high-speed devices, optical modules, etc., at every stage from R&D through to manufacturing and production at speeds from 50 Mbit/s to 12.5 Gbit/s.
Specifications.
Operation frequency: 0.05 to 12.5 GHz.
Internal CLOCK (Option 01) Frequency range: 0.05 to 12.5 GHz,
Internal CLOCK (Option 01) SSB phase noise: ≤-85 dBc/Hz (0.05 to 4 GHz), ≤-80 dBc/Hz (4 to 8 GHz), ≤-75 dBc/Hz (8 to 10 GHz), ≤-70 dBc/Hz (10 to 12.5 GHz) *At 10 kHz offset, 1 Hz bandwidth
External CLOCK input level: 0.4 to 2.5 Vp-p.

Pattern
Pseudorandom binary sequence pattern (PRBS)
Pattern: 2n - 1 (n: 7, 9, 11, 15, 20, 23, 31)
Mark ratio: 1/2, 1/4, 1/8, 0/8 (1/2, 3/4, 7/8, 8/8 are possible with logic inversion)
Bit shifts number for mark ratio varied: 1, 3 bits selectable
DATA pattern
DATA length: 2 to 8388608 bits
Alternate pattern
A/B pattern DATA length: 128 to 4194304 bits (128 bit steps); Loop time: A, B pattern (1 to 127, 1 steps)
Zero substitution pattern
Zero bit length: 1 to (pattern length - 1) bits; Pattern: 2n (n: 7, 9, 11, 15)
Error addition
Error rate: 10-n Error addition (n: 4, 5, 6, 7, 8, 9), and single error
External error injection: Provided

DATA output
Number of outputs: 2 (DATA/DATA independently)
Amplitude: 0.25 to 2 Vp-p, 2 mV steps
Offset voltage
VOH: -2 to +2 V, 1 mV steps
Display: VOH, VTH or VOL selectable
Rise/fall time: Typical 30 ps (10% to 90% of amplitude)
Pattern jitter: ≤20 psp-p, typical 10 psp-p
Waveform distortion: (0-peak) ≤15% or ≤150 mV whichever is greater
Gating input: Provided
Load impedance: 50 Ω (with back termination)
Connector: APC-3.5

CLOCK output
Number of outputs: 3 (CLOCK 1/CLOCK 1, CLOCK 2)
Amplitude
CLOCK 1/CLOCK 1: 0.25 to 2 Vp-p (2 mV steps)
CLOCK 2: 1 Vp-p
Offset voltage
CLOCK 1/CLOCK 1: VOH -2 to +2 V (1 mV steps)
CLOCK 2: VOH 0 V fixed
Rise/fall time: Typical 30 ps (10% to 90% of amplitude)
Load impedance: 50 Ω (CLOCK 1/CLOCK 1: with back termination)
Connector: CLOCK 1/CLOCK 1: APC-3.5, CLOCK 2: SMA
Delay: ±500 ps (1 ps steps)

Options
MP1763C-01: 12.5 GHz Synthesizer (50 MHz to 12.5 GHz)
MP1763C-03 1/4 speed output
MP1763C-08 1/4 Differential Data Output Function (100 Mbit/s to 3.125 Gbit/s)





Looking for a replacement? Try the  POCKETBERT PB10A

Standard Calibration $750.00 *
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*This is a Web introductory price for one calibration of the ANRITSU MP1763C. Price does not in most cases include measurement performance data. Pricing does include NIST traceable calibration and issue of a calibration certificate and calibration label. Pricing may vary slightly due to volume and location of laboratory supporting calibration. Volume pricing may apply. On-site fees may apply depending on logistics, location and volume of work to be completed during the visit.


Related Communication Terms and Definitions. For a complete list go to our  Terms and Definitions Page.

Dynamic Range
In a transmission system, the ratio of the overload level to the noise level of the system, usually expressed in dB. Ratio of the highest to lowest detectable signal of a system, expressed in dB.

POS
Packet over SONET/SDH (POS), is a communications protocol for transmitting packets in the form of the Point to Point Protocol (PPP) over SDH or SONET, which are both standard protocols for communicating digital information using lasers or light emitting diodes (LEDs) over optical fibre at high line rates.

TDMA: Time Division Multiple Access
Time Division Multiple Access (TDMA) is a method of sharing a communications carrier by assigning separate time slots to individual users. A channel is defined by a carrier frequency and time slot.


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